Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits
نویسندگان
چکیده
منابع مشابه
Integrated parametric timing optimization of digital systems
Many design techniques have been proposed to optimize the performance of a digital system implemented in a given technology. These techniques include retiming, insertion of intentional clock skew, insertion of buuers, transistor sizing, resynthesizing, and wave pipelining. Each of these techniques can be advantageous in particular applications, and they are often applied individually to enhance...
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Acknowledgements I am deeply grateful to my advisor, Prof. Michael Orshansky, for his guidance and support throughout these years. I took two courses about CAD/VLSI from Prof. Orshansky in the second year of the Ph.D. program. After that, I joined his research group, and started working on the dissertation. Prof. Orshansky has taught me almost everything about conducting research, and he has al...
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ژورنال
عنوان ژورنال: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
سال: 2006
ISSN: 0278-0070
DOI: 10.1109/tcad.2006.881332